bit0 |
Control of HSync (63.5ps)
0 = IRQ* to CPU disabled interrupt
1 = IRQ* to CPU enabled
|
bit1 |
Control of interrupt
0 = flag set on falling edge of HSync polarity
1 = flag set on rising edge of HSync
|
bit2 | Normally 1. 0 = changes $FF00 to data direction |
bit3 | Sel 1 LSB of two analog MUX select lines |
bit4 | Always 1 |
bit5 | Always 1 |
bit6 | Not used |
bit7 | Horizontal Sync interrupt flag |